Using MAX2392 in TD-SCDMA mobile phone design to meet the requirements of T3R4
Abstract: This application note introduces related technologies and design guidelines for changing the timing settings of MAX2392 to meet the T3R4 requirements in the TD-SCDMA standard.
The TD-SCDMA system standard stipulates that a subframe contains 7 fixed time slots and a dedicated time slot. The first fixed time slot (TS0) is configured for downlink, and the second fixed time slot (TS1) is configured for uplink. The dedicated time slot is located between TS0 and TS1 and is used for the synchronization of the downlink and uplink frequencies, and provides a protection gap for the downlink to uplink handover. After TS1, the system may return to the downlink after several time slots, depending on the length of the transmitted data. Sometimes, the mobile phone needs to quickly switch to the downlink after the end of the uplink time slot. As shown in Figure 1, the mobile phone is required to have fast switching capability, and the protection gap between the uplink and downlink is only 12.5µs. Meeting this switching requirement faces two challenges:
If the receiver is turned on after the end of the Tx time slot, the DC offset of the zero-IF receiver may not be eliminated within the protection gap. If the receiver is turned on in the Tx time slot, the Tx signal will cause the receiver to saturate due to the Tx / Rx isolation limit.
Figure 1. The form of T3R4 in the TD-SCDMA system
MAX2392 is a zero-IF receiver, which can fully meet the system requirements of T3R4 through the given control timing.
The MAX2392's DC cancellation circuit uses a two-stage high-pass filter (as shown in Figure 2). The filter after the mixer is used to eliminate the DC product of the mixer. The latter VGA filter is used to eliminate the DC offset generated in VGA. In typical applications, the high-pass inflection point of these high-pass filters is 8.6kHz, which can also be set to 1MHz to quickly establish stability.
If these high-pass filters are set to 1MHz, and the LNA is turned off, you can avoid the receiver from being saturated during the transmission slot. Of course, this depends on the isolation of the Tx / Rx switch. If the isolation of the Tx / Rx switch is not very high, you may need to add a switch before the LNA to avoid saturation of the receiver caused by the Tx signal. 
Figure 2. Schematic diagram of the MAX2392 high-pass filter circuit
When the Tx time slot ends, the LNA is turned on and placed in high-gain mode; the high-pass filter returns to 8.6kHz (standard mode) after eliminating the DC offset.
Figure 3 illustrates a control timing scheme that allows the MAX2392 to meet the system requirements of T3R4. 
Figure 3. Using MAX2392 to meet T3R4 time slot control requirements
Experiments show that the MAX2392 using the above control timing can well meet the TD-SCDMA T3R4 system requirements.
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