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The traditional telephone network transmits voice signals in a circuit-switched manner, and requires a basic bandwidth of 64 Kb/s. According to statistics, in the normal call situation, only about 40% of the time is the voice period, and the rest of the time is empty, and the network bandwidth utilization is not high. With the continuous development of computer technology, especially the continuous improvement of the Internet, packet-based data communication has become the most important communication method. To transmit voice over an IP-based packet network, the analog voice signal must be specially processed so that the processed signal can be adapted to be transmitted over a connectionless packet network. This is packet voice technology. This article describes an IP phone design based on the ARM7 core.
G.728 coding standard
Speech coding technology is one of the core technologies of IP telephony. The quality of coding is directly related to the communication quality of IP telephony.
The G.728 standard speech coding algorithm is a 16Kb/s vocoder coding standard that uses low latency codebook excitation linear prediction (LD-CELP) techniques. The linear predictor uses a feedback-type backward adaptive technique. The predictor coefficients are updated based on the speech quantized data of the previous frame. Therefore, the algorithm has a short delay of 0.625 ms, which is equivalent to 5 sampling points. It is also a frame of G.728 for a long time. Since the feedback adaptive technique is used, the predictor coefficients need not be transmitted, and the only signal that needs to be transmitted is the excitation signal quantized value, which is the codebook index value. The codebook of the G.728 standard speech coding algorithm has a total of 1024 vectors, and the index needs to occupy 10 bits, so its bit rate is 10/0.625=16 Kb/s.
The main features of the G.728 standard speech coding are: algorithm delay is only 0.625ms; one channel coding delay is less than 2ms; transmission bit rate is 16Kb/s; MOS value is 4.173, which achieves long-distance communication quality.
Because the G.728 standard speech coding algorithm has a short delay and the speech transmission bit rate can meet the application requirements of IP telephony, the G.728 standard speech coding algorithm is selected as the IP telephony coding algorithm.
Hardware system design
The TMS470R1A256 is part of the TI TMS470R1x general purpose 16/32-bit reduced instruction microcontroller family. The family uses a high-speed ARM7 core to ensure high performance, high throughput and code space efficiency.
The main function of the system is to make full use of the high-speed data processing capability of the ARM7 core to reduce the burden on the computer CPU; the voice input and output systems are also separated separately, which can better transmit data with the MCU and reduce unnecessary intermediate links. , reduce the delay. Finally, the data is transferred to the computer via the high speed PCI bus. The overall structure of the system is shown in Figure 1. The specific functions of each module are shown in Table 1.
Figure 1 System overall structure block diagram
1 MCU and Flash communication
Since the I/O interface voltage of the TMS470R1A256 is 3.3V, and the interface voltage of the AM29F101B is 5V, voltage conversion is required at the interface part, and the chip select signal (CE) and output enable signal (OE) of the AM29F101B require address decoding. . These tasks are all done by a complex programmable logic device (CPLD).
Since the interface speed of the AM29F101B is slow, the interface between the TMS470R1A256 and the AM29F101B must be inserted into the software wait state. The number of software wait states to be inserted can be calculated from the data sheet or experimentally obtained during the tuning. The interface circuit between TMS470R1A256 and AM29F101B is shown in Figure 2.
Figure 2 MCU and Flash interface circuit
2 MCU and ADC, DAC communication
The G.728 standard speech coding algorithm selected for this system requires a sampling rate of 8 kHz. Therefore, the maximum sampling rate or conversion time for ADC and DAC is not less than 8 kHz.
According to the characteristics of the voice signal, TI's TLC32044 chip is selected, which is a chip that integrates the functions of ADC and DAC. Its maximum conversion rate is 19.2kHz, the number of conversion bits is 14 bits, the input voltage band range is adjustable, there is a standard synchronous serial port, and there are input filters and output reconstruction filters, which can eliminate the design of analog filters. The interface circuit of TMS470R1A256 and TLC32044 is shown as in Fig. 3.
Figure 3 MCU and ADC, DAC interface circuit
3 MCU and dual port RAM communication
In order to reflect the advantages of PCI bus speed, the fast-speed dual-port RAM chip CY7C133-25 is selected, and its maximum transmission rate is 25 ns. The address of the dual port RAM in the data space of the MCU is 8000H to 87FFH.
What needs to be emphasized is the BUSY signal of the dual port RAM. This design does not use this signal because the different parts of the dual port RAM are operated separately, so any conflicts that may occur are avoided, thus eliminating the BUSY signal, which is left floating.
The voltage conversion and address decoding of the circuit are also done by the CPLD. The interface circuit between the MCU and the dual port RAM is shown in Figure 4.
Figure 4 interface circuit of MCU and dual port RAM
4 Communication between PCI9052 and dual port RAM
The task of the MCU is to complete the encoding and decoding of the voice, and then exchange data with the computer through the PCI bus. A dual-port RAM (capacity of 2k×16bit) is used for data exchange between the MCU and the PCI9052.
Since the PCI9052 has five local address spaces and four local device chip select signals, the connection becomes quite simple. It only needs to map the dual port RAM to one of the local address spaces, and then use one of the chip select signals to connect to The CE of the dual port RAM finally connects the read and write signals (R/W) and OE of the PCI9052 to the R/W and OE of the dual port RAM. This eliminates peripheral logic circuits such as address decoding.
Software system design
The algorithm to be implemented by the IP telephone system is the speech coding algorithm, and the data exchange with the computer is also completed.
The main function of the software part is to use the TCP/IP protocol in the embedded operating system to package the voice coded signals that need to be transmitted, and then transmit the data to the receiver through the Internet through the network card on the computer, and receive the received TCP/IP. The packet is restored to the original speech coded signal, and finally transmitted to the MCU for voice decoding through the PCI bus.
Conclusion
The main advantage of this design scheme is that the requirements of the computer hardware are not high, the processing speed is fast, the input and output systems of the voice are separately integrated, and the signal to noise ratio is high.
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