The Cortex-M33 is the first full-featured ARMv8-M processor with TrustZone® security technology and digital signal processing technology. The processor supports a wide range of flexible configuration options and is deployed in a wide range of applications, as well as a dedicated coprocessor interface to support operations that often require acceleration and large amounts of computation. The Cortex-M33 is the processor that strikes the best balance between performance, power, safety and productivity.
To significantly reduce system power consumption, the Cortex-M33 processor uses an orderly third-order pipeline technology. Most instructions can be completed in the first two phases, while complex instructions require three phases. In addition, some 16-bit instructions will use a dual transmit mechanism to enhance performance. The processor core has two AMBA® 5 AHB5 interfaces: C-AHB and S-AHB, fully symmetrical, with consistent instruction and data extraction performance.
The Cortex-M33 is highly flexible to meet a wide range of system requirementsBy choosing the best combination of MPU, DSP, FPU, TrustZone, ETM, MTB, ITM, BPU, DWT and coprocessor interface functions, designers can quickly build powerful systems. In a minimal control system, the NVIC can be set to accommodate only one external interrupt;
In a system with a rich peripheral, the NVIC can be set to accommodate up to 480 external interrupts, including up to 256 priority levels. For systems that rely on a large number of active processes and threads to keep them running reliably, designers can also add MPUs to forcibly isolate processes with privileged and unprivileged access controls.
For a higher level of code, data and resource protection, TrustZone is the designer's choice.
The application complexity is getting higher and higher, and the value of on-chip debugging and tracking technology is becoming more and more prominent, which is crucial for ensuring timely delivery of products. The built-in debugging capabilities of the Cortex-M33 processor accelerate software verification. Designers can use the JTAG port or dual-pin serial debug port to verify the system. ETM or MTB can be selected for excellent command tracking, while BPU and DWT allow breakpoints and hardware observation points to be used in debugging.
Now let's explore the five characteristics of the Cortex-M33:
1 – TrustZone technology optimized for ARMv8-M escorts the security of the entire system
The Cortex-M33 processor with TrustZone technology has two security states and a variety of related features:
The full utilization of security and non-security status will open the door to many new opportunities and new applications. The high-value patented firmware used in the system can be operated in a safe state. The supervisor code set in a secure state can be restored to its original state after the system is attacked or unreliable; the non-secure side is open to millions of developers who are developing software with Cortex-M as before.
2 – Collaborative processor interface for high scalability
For some applications, dedicated computing can be quite useful; but to achieve dedicated computing, all the advantages of the world's most powerful design ecosystem must be preserved, allowing designers to develop tools, compilers, and debuggers. The choice between the operating system and the middleware is maximized. The ARM ecosystem can help developers save time and money and increase productivity.
The Cortex-M33 processor includes an optional, bus-like interface for integrating tightly coupled accelerator hardware. For operations that require frequent operations, this interface can help designers improve general-purpose computing power with custom processing hardware. It is important to note that this does not divide the entire ecosystem. The interface contains control and data paths for up to eight coprocessors, and signals are sent to display the processor's privileged state and security state, instruction type, associated registers, and operational fields. The coprocessor is usually done in a few few loops, or it runs in the background and stops automatically when it's done. The details and data of the operation can be transmitted simultaneously with the single instruction through the interface, and a waiting state can be inserted if necessary.
3 – Storage Protection Unit (MPU) for task isolation
Designers can program the optional MPU to provide up to 16 zones for each safe and unsafe state. In a multitasking environment, the operating system can reprogram MPUs as task context switches, defining storage access permissions for each task. For example, if an application's task is only allowed to access certain application data and specific peripheral devices, in this case, the MPU will protect all other storage and peripheral devices, blocking or delaying unauthorized access. Improve system reliability.
The development of the Cortex-M33 storage protection architecture is based on the protected storage system architecture PMSAv8. The latest version is equipped with a baseline and limit comparator for each zone instead of the previous quadratic size alignment model. Each zone has a baseline initial address, a termination address, and a set of access permissions and storage properties, so in this architecture, designers no longer have to worry about integrating multiple zones when designing an MPU zone. Trouble. After the enhancement of the function, the software development becomes simpler, the customer's willingness to use is increased, the programming steps are also reduced, and the number of situation conversions is further reduced.
4 – DSP expansion
The optional integer DSP extension adds 85 new instructions to the system. In most cases, DSP instructions can increase performance by an average of three times, making all applications centered on digital signal control soaring.
To help designers accelerate software development, ARM will provide a free DSP library in the CMSIS project, including a full set of filtering, transformation and math functions (such as matrices), and support multiple data types. The CMSIS project is open source and its development details are posted on github.
5 – single precision floating point unit
The FPv5-based optional single-precision floating-point expansion unit includes an additional 16-port 64-bit register file. The expansion adds 45 IEEE 754-2008 compatible single-precision floating-point instructions. Using a floating point instruction typically increases the average performance of the software library by a factor of 10. The FPU is located in a separate power domain and is responsible for shutting down the power supply when the entire unit is not in use.
The Cortex-M33 is a processor that delivers the best balance between performance, power and safety.
Embedded solutions are becoming more complex, and the value they bring is growing. The challenge for today's designers is to find the best balance between conflicting design elements. In addition, the number of software included in the system-on-a-chip is increasing significantly, but project development time is shrinking. In order to deliver qualified products in less time, to ensure performance and reduce costs, we must take the right first step.
The Cortex-M33 came into being, and in order to take the right first step, ARM has combined its past experience with the existing Cortex-M ecosystem to achieve lower development costs. Thanks to a new design with multiple low-power technologies, the first is to reduce system power consumption; for users who create security solutions, TrustZone technology provides a solid foundation for their applications and valuable IP. The upgraded MPU and TrustZone work together to improve system reliability and protection. Finally, it is worth mentioning that we will never stop pursuing the pace of productivity. TrustZone was originally designed to ensure that current users continue to develop in non-security areas as they have in the past. The Cortex-M33 also enhances debugging and tracking performance, making complex code operations easier. As with all other Cortex-M processors, all programming of the Cortex-M33 can be done in the C language environment, including all exception handlers. All in all, the above features were born to help developers increase productivity and design more complex solutions in less time.
In the process of defining and developing a new generation of processors, many chip vendors have become ARM partners and actively use TrustZone security technology to design chips. The ARM ecosystem also focuses on porting tools and software to the Cortex-M33. While the Cortex-M33 has achieved the best balance between performance, power, safety and productivity, ARM and its partners will continue to work hard to provide developers with better products that help them to expand their ideas and achieve vision. Create a more connected, smarter, and safer world.
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